Qiea/stm32-cnn
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

init

Browse Source
This commit is contained in:
Qiea
2024-12-19 14:06:05 +08:00
parent 1c0f3b676f
commit dcd484c1bd
58 changed files with 14859 additions and 863 deletions
Download Patch File Download Diff File Expand all files Collapse all files

58
HARDWARE/SDRAM/sdram.h
View File

@@ -1,22 +1,30 @@
//-----------------------------------------------------------------
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:
// SDRAM<41><4D><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD>ļ<EFBFBD>
// <20><> <20><>: <20><><EFBFBD>ǵ<EFBFBD><C7B5><EFBFBD>
// <20><>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD>: 2018-08-04
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: 2018-08-04
// <20>޸<EFBFBD><DEB8><EFBFBD><EFBFBD><EFBFBD>:
// <20><>ǰ<EFBFBD>汾: V1.0
// <20><>ʷ<EFBFBD>汾:
// - V1.0: (2018-08-04)SDRAM<41><4D>ʼ<EFBFBD><CABC>
// <20><><EFBFBD>Թ<EFBFBD><D4B9><EFBFBD>: <20><><EFBFBD><EFBFBD>STM32F429+Cyclone IV<49><56><EFBFBD><EFBFBD>ϵͳ<CFB5><CDB3><EFBFBD>ƿ<EFBFBD><C6BF><EFBFBD><EFBFBD>塢LZE_ST_LINK2
// ˵ <20><>:
//
//-----------------------------------------------------------------
#ifndef _SDRAM_H
#define _SDRAM_H
#include "sys.h"
//////////////////////////////////////////////////////////////////////////////////
//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֻ<EFBFBD><EFBFBD>ѧϰʹ<EFBFBD>ã<EFBFBD>δ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɣ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>κ<EFBFBD><EFBFBD><EFBFBD>;
//ALIENTEK STM32F429<32><39><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
//SDRAM<41><4D><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
//<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ԭ<EFBFBD><EFBFBD>@ALIENTEK
//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>̳:www.openedv.com
//<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:2016/1/6
//<2F>汾<EFBFBD><E6B1BE>V1.0
//<2F><>Ȩ<EFBFBD><C8A8><EFBFBD>У<EFBFBD><D0A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ؾ<EFBFBD><D8BE><EFBFBD>
//Copyright(C) <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӿƼ<D3BF><C6BC><EFBFBD><EFBFBD>޹<EFBFBD>˾ 2014-2024
//All rights reserved
//////////////////////////////////////////////////////////////////////////////////
extern SDRAM_HandleTypeDef SDRAM_Handler;//SDRAM<41><4D><EFBFBD><EFBFBD>
#define Bank5_SDRAM_ADDR ((u32)(0XC0000000)) //SDRAM<41><4D>ʼ<EFBFBD><CABC>ַ
#include "stm32f429_winner.h"
//-----------------------------------------------------------------
// <EFBFBD><EFBFBD><EFBFBD><EFBFBD>
//-----------------------------------------------------------------
extern SDRAM_HandleTypeDef SDRAM_Handler;// SDRAM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>
//-----------------------------------------------------------------
// <20>궨<EFBFBD><EFBFBD>
//-----------------------------------------------------------------
#define Bank5_SDRAM_ADDR ((u32)(0XC0000000)) // SDRAM<41><4D>ʼ<EFBFBD><CABC>ַ
//SDRAM<41><4D><EFBFBD>ò<EFBFBD><C3B2><EFBFBD>
// SDRAM<EFBFBD><EFBFBD><EFBFBD>ò<EFBFBD><EFBFBD><EFBFBD>
#define SDRAM_MODEREG_BURST_LENGTH_1 ((u16)0x0000)
#define SDRAM_MODEREG_BURST_LENGTH_2 ((u16)0x0001)
#define SDRAM_MODEREG_BURST_LENGTH_4 ((u16)0x0002)
@@ -29,10 +37,16 @@ extern SDRAM_HandleTypeDef SDRAM_Handler;//SDRAM
#define SDRAM_MODEREG_WRITEBURST_MODE_PROGRAMMED ((u16)0x0000)
#define SDRAM_MODEREG_WRITEBURST_MODE_SINGLE ((u16)0x0200)
void SDRAM_Init(void);
void SDRAM_MPU_Config(void);
u8 SDRAM_Send_Cmd(u8 bankx,u8 cmd,u8 refresh,u16 regval);
void FMC_SDRAM_WriteBuffer(u8 *pBuffer,u32 WriteAddr,u32 n);
void FMC_SDRAM_ReadBuffer(u8 *pBuffer,u32 ReadAddr,u32 n);
void SDRAM_Initialization_Sequence(SDRAM_HandleTypeDef *hsdram);
//-----------------------------------------------------------------
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
//-----------------------------------------------------------------
extern void SDRAM_Init(void);
extern void SDRAM_MPU_Config(void);
extern u8 SDRAM_Send_Cmd(u8 bankx,u8 cmd,u8 refresh,u16 regval);
extern void FMC_SDRAM_WriteBuffer(u8 *pBuffer,u32 WriteAddr,u32 n);
extern void FMC_SDRAM_ReadBuffer(u8 *pBuffer,u32 ReadAddr,u32 n);
extern void SDRAM_Initialization_Sequence(SDRAM_HandleTypeDef *hsdram);
#endif
//-----------------------------------------------------------------
// End Of File
//-----------------------------------------------------------------